In conventional constant on-time or hysteretic mode self-clocking DC-DC voltage converters, the generation of the PWM signal is triggered by the ripple of the output voltage. For a DC-DC voltage converter, an output capacitor having a smaller equivalent series resistance will result in a smaller ripple of the output voltage; however, if the ripple is too small, the loop stability will be impaired. Conversely, an output capacitor having a greater equivalent series resistance contributes to increasing loop stability, and yet the resultant output ripple may be so large as to exceed the specification of the voltage converter. Hence, there is always a trade-off between a small output voltage ripple and enough loop stability.
There have been two approaches to achieve a small output voltage ripple while remaining loop stability, both relying on a resistor-capacitor network to generate a signal synchronous or substantially synchronous with the inductor current for stabilizing the loop. As shown in FIG. 1, a conventional DC-DC converter using a ceramic capacitor for the output capacitor COUT has a very small equivalent series resistance RC thereof and therefore, the output voltage VOUT has a small ripple and can be regarded as a DC signal. A resistor voltage divider 1 divides the output voltage VOUT to generate a feedback signal VFB. Due to the small ripple of the output voltage VOUT, the feedback signal VFB also has a small ripple. The output inductor L is connected in parallel with a resistor-capacitor network which includes an external resistor R3 and an external capacitor C3 connected in series. The voltage across the capacitor C3 is equal to the voltage across the equivalent series resistance RL of the output inductor L, which is equal to the product of the inductor current IL and the equivalent series resistance RL. This voltage is converted into a synchronous triangular-wave signal to add to the feedback signal VFB to thereby generate a signal VFB1 having a larger ripple, in place of the original feedback signal VFB, for the PWM controller. The signal VFB1 is equivalent to a feedback signal obtained by dividing an output voltage having a large ripple and thus the loop remains stable despite the fact that the output voltage VOUT has a small ripple. Alternatively, as shown in FIG. 2, an external resistor RS is serially connected to the low-side element Q2 to extract a signal related to the inductor current IL to retrieve a larger ripple for loop stability. While the above two approaches realize a small output voltage ripple and loop stability by using external elements, higher component costs will be needed.
Therefore, it is desired a PWM controller and method for realizing a small output voltage ripple and loop stability without the use of additional external elements.